The present invention relates to analog to digital conversion circuits, and more particularly to an autocalibrated multistage A/D converter that maintains appropriate error correction levels for each stage during operation of the converter after being initially set at calibration to minimize quantization errors.
High speed analog to digital converters (ADC) that encode or digitize continuously are usually of the "flash" or all-parallel design. These converters represent a brute force approach to very high speed conversion since they require a comparator, voltage reference and digital translation for every quantization level. Therefore multistage converters, such as the dual-stage flash A/D converter disclosed in U.S. Pat. No. 4,535,319 issued Aug. 13, 1985 to Bruce J. Penney or the three stage ADC disclosed in WESCON/82 Professional Program Session Record 30 by Sid Kauffman, are used to provide high resolution with far fewer elements with a tradeoff in conversion speed. A basic multistage ADC has a first quantizer to which is input an analog signal to be digitized, a digital to analog converter (DAC) to convert the output of the first quantizer to an equivalent analog signal, means for subtracting the equivalent analog signal from the input analog signal to produce a difference signal, a second quantizer to which is input the difference signal, a second DAC and means for subtracting the output of the second DAC from the difference signal to produce a second difference signal, a third quantizer to which is input the second difference signal, etc. A digital correction circuit receives the outputs of the quantizers to produce a final output digital value corresponding to the input analog signal.
Timing is usually provided by a timing circuit which generates strobe pulses for the various circuit components, each strobe pulse having a fixed time relationship with a reference strobe pulse. For precision conversion the phase of each strobe signal has to be maintained constant during operation of the ADC. Other internal quantization problems that arise in the operation of the multistage ADC include first quantizer gain, offset or linearity errors, digital to analog gain or offset errors and limiter amplifier offset errors. Typically the phases of the strobe pulses and other error correction levels are set at calibration, but they tend to drift with component aging, temperature and other environmental effects, resulting in quantization errors in the output of the ADC.
What is desired is a means for maintaining proper error correction levels for multiple stages of a multistage ADC during operation of the converter to minimize quantization errors due to component aging, temperature and other environmental effects.